CD4063 Comparator

CD4063BMS is a 4-bit magnitude comparator designed for usein computer and logic applications that require the comparison oftwo 4-bit words. This logic circuit determines whether one 4-bitword (Binary or BCD) is “less than”, “equal to”, or “greater than” asecond 4-bit word.The CD4063BMS has eight comparing inputs (A3, B3, throughA0, B0), three outputs (A < B, A = B, A > B) and three cascadinginputs (A < B, A = B, A > B) that permit systems designers toexpand the comparator function to 8, 12, 16 . . . 4N bits. When asingle CD4063BMS is used, the cascading inputs are connectedas follows: (A < B) = low, (A = B) = high, (A > B) = low.For words longer than 4 bits, CD4063BMS devices may be cascadedby connecting the outputs of the less significant comparatorto the corresponding cascading inputs of the more significantcomparator. Cascading inputs (A < B, A = B, and A > B) on theleast significant comparator are connected to a low, a high, and alow level, respectively.

The CD4063BMS is supplied in these 16 lead outline packages: